Attorneys involved in patent litigation related to integrated circuits often need to analyze the chip layout of both the plaintiff's and responding party's designs to demonstrate similarities or differences.
This is normally accomplished by starting with the GDSII stream data files that are used to produce the mask set for the semiconductor chips in question. An expert witness can examine this data and describe design features that may have been copied.
Viewing and Plotting Chip Data
Viewing a large chip design requires specialized software. Artwork developed such software in the early 90's and is a leading supplier of layout viewing tools to the EDA industry. Law firms can purchase or rent such software for their own use or on behalf of their expert witnesses.
Plotting a chip layout in large format (up to 36 inches) also requires specialized software and a large format plotter.
Firms can also contract with Artwork to view, analyze and generate prints or plots of selected regions based on directives issued by their expert witnesses.
Optimizing the Presentation
A chip layout is very complicated and merely displaying a plot of the various layers may not be useful. Optimizing a print or plot consists of selecting layers, assigning color and fill patterns and transparency to these layers in a way that highlights the point one is trying to make. (It does not involve any editing of the actual data other than cropping into a particular region of the chip.)
It is often useful to present the layout in a series of snapshots (this is easily done in Power Point or Flash) that demonstrate how the chip is "built up" step by step.
Often one needs to bring clarity to a layout and this can be done by superimposing boundaries or colors over a complex print. Artwork's viewing software allows an expert to identify blocks - these are later labeled using tools such as Adobe Illustrator. See an example PDF file here